HD64F2145 datasheet(304/829 Pages) RENESAS

tên linh kiện	HD64F2145

Giải thích chi tiết về linh kiện	Hitachi 16-Bit Single-Chip Microcomputer

PDF	829 Pages

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nhà sản xuất	RENESAS [Renesas Technology Corp]

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304 / 829 page

Rev. 2.0, 08/02, page 264 of 788

Address

OCRAR (OCRAF)

address

Internal write signal

Compare-match signal

FRC

Automatic addition is not performed

because compare-match signals are disabled.

Disabled

OCRA

N+1

OCRAR (OCRAF)

Old data

New data

Write cycle of OCRAR/OCRAF

Figure 11.20 Conflict between OCRAR/OCRAF Write and Compare-Match

(When Automatic Addition Function is Used)

11.7.4

Switching of Internal Clock and FRC Operation

When the internal clock is changed, the changeover may cause FRC to increment. This depends on

the time at which the clock is switched (bits CKS1 and CKS0 are rewritten), as shown in table

11.3.

When an internal clock is used, the FRC clock is generated on detection of the falling edge of the

internal clock scaled from the system clock (ø). If the clock is changed when the old source is high

and the new source is low, as in case no. 3 in table 11.3, the changeover is regarded as a falling

edge that triggers the FRC clock, and FRC is incremented. Switching between an internal clock

and external clock can also cause FRC to increment.

HD64F2145 bảng dữ liệu(PDF) 304 Page - Renesas Technology Corp