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SPI(x1/x2/x4) NAND Flash
1G
36
10.8 Program Load Random Data Quad IO (72H)
The Program Load Random Data Quad IO command (72H) is similar to the Program Load Random Data x4 command
(C4H) but with the capability to input the 4 dummy bits, and a 12-bit column address by four pins: SIO0, SIO1, SIO2, and
SIO3. The command sequence is shown below. The Quad Enable bit (QE) of feature (B0[0]) must be set to enable for the
program load random data x4 command. See Figure10-6 for details. This command is only available during internal data
move sequence.
Figure10-6. Program Load Random Data Quad IO Sequence Diagram
Command
0
1
2
3
4
5
6
7
72H
CS#
8
9 10
13 14 15 16 17 18 19 20
4
0
SI(SIO0)
SO(SIO1)
WP#(SIO2)
HOLD#(SIO3)
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
Byte1 Byte2
CS#
SI(SIO0)
SO(SIO1)
WP#(SIO2)
HOLD#(SIO3)
23 24 25 26
22
27 28
21
31 32 33 34
30
35 36
29
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
Byte11
4
0
5
1
6
2
7
3
Byte12
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
Byte
2176/2112
11 12
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
SCLK
SCLK
Dummy<3:0>
A11-A0
Note: when internal ECC disabled the Data is 2176, when internal ECC enabled the Data Byte is 2112.



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