NUC505-YO2G datasheet(97/130 Pages) NUVOTON

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Giải thích chi tiết về linh kiện	ARM짰 Cortex짰-M4 32-bit Microcontroller

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97 / 130 page

NUC505

July. 26, 2018

Page 97 of 130

Rev.1.08

Serial Peripheral Interface (SPI)

6.12

6.12.1 Overview

The Serial Peripheral Interface (SPI) is a synchronous serial data communication protocol that

operates in full duplex mode. Devices communicate in Master/Slave mode with the 4-wire bi-

direction interface. The NUC505 series contains one set of SPI controller performing a serial-to-

parallel conversion on data received from a peripheral device, and a parallel-to-serial conversion

on data transmitted to a peripheral device. Also, the SPI controller can be configured as a master

or a slave device.

6.12.2 Features



Supports Master or Slave mode operation



Configurable bit length of a transfer word from 8 to 32-bit



Provides separate 8-level depth transmit and receive FIFO buffers



Supports MSB first or LSB first transfer sequence



Supports byte reorder function



Supports Byte or Word Suspend mode



Supports 3-wire, no slave select signal, bi-direction interface



Up to 2 sets of SPI controllers

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