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NUC505-YO2G bảng dữ liệu(PDF) 72 Page - Nuvoton Technology Corporation

tên linh kiện NUC505-YO2G
Giải thích chi tiết về linh kiện  ARM짰 Cortex짰-M4 32-bit Microcontroller
PDF  130 Pages
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nhà sản xuất  NUVOTON [Nuvoton Technology Corporation]
Trang chủ  http://www.nuvoton.com
Logo NUVOTON - Nuvoton Technology Corporation

NUC505-YO2G bảng dữ liệu(HTML) 72 Page - Nuvoton Technology Corporation

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NUC505
July. 26, 2018
Page 72 of 130
Rev.1.08
System Manager
6.2
6.2.1
Overview
The following functions are included in system manager section
 System reset
 System memory map
 Bus arbitration algorithm
 Global control registers
 System Timer (Systick)
 Nested Vectored Interrupt Control (NVIC)
 System control register map and description
6.2.2
System Reset
 Hardware Reset
─
Power-on Reset (POR)
─
Low level on the nRESET Pin (nRST)
─
Watchdog time-out reset (WDT)
─
Low voltage reset (LVR)
 Software Reset
─
SYSRESETREQ (AIRCR[2])
─
CPU Reset (SYS_IPRST0[0])
─
CHIPRST (SYS_IPRST0 [1])
Note1: SYSRESETREQ (AIRCR[2]) reset the whole chip including all peripherals, but does not reset
SPIM function, vector map module parameter setting, and PA.8~PA.15 multi-function setting.
Note2: CPU Rest (SYS_IPRST0[0]) only resets the CPU function.
Note3: CHIPRST (SYS_IPRST0[1]) reset the whole chip including all peripherals.



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