AD9523BCPZ datasheet(27/60 Pages) AD

tên linh kiện	AD9523BCPZ

Giải thích chi tiết về linh kiện	Jitter Cleaner and Clock Generator

PDF	60 Pages

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27 / 60 page

Data Sheet

AD9523

Rev. D | Page 27 of 60

POWER-DOWN MODE

Chip Power-Down via PD

Place the AD9523 into a power-down mode by pulling the PD pin

low. Power-down turns off most of the functions and currents

inside the AD9523. The chip remains in this power-down state

until PD is returned to a logic high state. When taken out of power-

down mode, the AD9523 returns to the settings programmed

into its registers prior to the power-down, unless the registers are

changed by new programming while the PD pin is held low.

POWER SUPPLY SEQUENCING

The AD9523 has multiple power supply domains that operate

with 3.3 V, and the output supply domain that operates on 1.8 V.

To ensure proper device operation, bring the 1.8 V supplies high

and stable prior to or simultaneously with the 3.3 V supplies. It

is recommended to hold the RESET pin low while both supply

domains settle to ensure that the 3.3 V supplies do not lead the

1.8 V supplies.

AD9523BCPZ bảng dữ liệu(PDF) 27 Page - Analog Devices