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AD9523BCPZ bảng dữ liệu(PDF) 59 Page - Analog Devices

tên linh kiện AD9523BCPZ
Giải thích chi tiết về linh kiện  Jitter Cleaner and Clock Generator
PDF  60 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD9523BCPZ bảng dữ liệu(HTML) 59 Page - Analog Devices

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Data Sheet
AD9523
Rev. D | Page 59 of 60
EEPROM Control (Address 0xB00 to Address 0xB03)
Table 59. STATUS_EEPROM
Address
Bits
Bit Name
Description
0xB00
[7:1]
Reserved
Reserved.
0
STATUS_EEPROM
(read only)
This read-only bit indicates the status of the data transferred between the EEPROM and the
buffer register bank during the writing and reading of the EEPROM. This signal is also
available at the STATUS0 pin when Register 0x232[4] is set.
0: data transfer is complete.
1: data transfer is not complete.
Table 60. EEPROM Error Checking Readback
Address
Bits
Bit Name
Description
0xB01
[7:1]
Reserved
Reserved.
0
EEPROM data error
(read only)
This read-only bit indicates an error during the data transfer between the EEPROM and the buffer.
0: no error; data is correct.
1: incorrect data detected.
Table 61. EEPROM Control 1
Address
Bits
Bit Name
Description
0xB02
[7:2]
Reserved
Reserved.
1
SOFT_EEPROM
When the EEPROM_SEL pin is tied low, setting the SOFT_EEPROM bit resets the AD9523 using
the settings saved in EEPROM.
1: soft reset with EEPROM settings (self-clearing).
0
Enable EEPROM write
Enables the user to write to the EEPROM.
0: EEPROM write protection is enabled. User cannot write to EEPROM (default).
1: EEPROM write protection is disabled. User can write to EEPROM.
Table 62. EEPROM Control 2
Address
Bits
Bit Name
Description
0xB03
[7:1]
Reserved
Reserved.
0
REG2EEPROM
Transfers data from the buffer register to the EEPROM (self-clearing).
1: setting this bit initiates the data transfer from the buffer register to the EEPROM (writing
process); it is reset by the I²C master after the data transfer is done.



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