MMPF0100Z datasheet(62/128 Pages) NXP

62 / 128 page

NXP Semiconductors

PF0100Z

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

Table 70. Register SW3ACONF - ADDR 0x40

Name

Bit #

R/W

Default

Description

SW3AILIM

R/W

0x00

SW3A current limit level selection

0 = High level current limit

1 = Low level current limit

UNUSED

R/W

0x00

unused

SW3AFREQ

3:2

R/W

0x00

SW3A switching frequency selector. See

Table 37.

SW3APHASE

5:4

R/W

0x00

SW3A phase clock selection. See Table 35.

SW3ADVSSPEED

7:6

R/W

0x00

SW3A DVS speed selection. See Table 34.

Table 71. Register SW3BVOLT - ADDR 0x43

Name

Bit #

R/W

Default

Description

SW3B

5:0

R/W

0x00

Sets the SW3B output voltage (independent)

during normal operation mode. See Table 64 for

all possible configurations.

SW3B

0x00

Sets the operating output voltage range for SW3B

(independent). Set during OTP or TBB

configuration only. See Table 64 for all possible

configurations.

UNUSED

–

0x00

unused

Table 72. Register SW3BSTBY - ADDR 0x44

Name

Bit #

R/W

Default

Description

SW3BSTBY

5:0

R/W

0x00

Sets the SW3B output voltage (Independent)

during standby mode. See Table 64 for all

possible configurations.

SW3BSTBY

0x00

Sets the operating output voltage range for SW3B

(independent) on standby mode. This bit inherits

the value configured on bit SW3B[6] during OTP

or TBB configuration. See Table 64 for all

possible configurations.

UNUSED

–

0x00

unused

Table 73. Register SW3BOFF - ADDR 0x45

Name

Bit #

R/W

Default

Description

SW3BOFF

5:0

R/W

0x00

Sets the SW3B output voltage (independent)

during sleep mode. See Table 64 for all possible

configurations.

SW3BOFF

0x00

Sets the operating output voltage range for SW3B

(independent) on sleep mode. This bit inherits the

value configured on bit SW3B[6] during OTP or

TBB configuration. See Table 64 for all possible

configurations.

UNUSED

–

0x00

unused

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