PIC18F4539-ESLASHMLSQTP datasheet(224/322 Pages) MICROCHIP

224 / 322 page

PIC18FXX39

DS30485A-page 222

Preliminary

 2002 Microchip Technology Inc.

BNOV

Branch if Not Overflow

Syntax:

[ label ] BNOV n

Operands:

-128

≤ n ≤ 127

Operation:

if overflow bit is ‘0’

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1110

0101

nnnn

Description:

If the Overflow bit is ‘0’, then the

program will branch.

The 2’s complement number ‘2n’ is

added to the PC. Since the PC will

have incremented to fetch the next

instruction, the new address will be

PC+2+2n. This instruction is then

a two-cycle instruction.

Words:

Cycles:

1(2)

Q Cycle Activity:

If Jump:

Decode

Read literal

'n'

Process

Data

Write to PC

operation

If No Jump:

Decode

Read literal

'n'

Process

Data

operation

Example:

HERE

BNOV

Jump

Before Instruction

address (HERE)

After Instruction

If Overflow

address (Jump)

If Overflow

address (HERE+2)

BNZ

Branch if Not Zero

Syntax:

[ label ] BNZ n

Operands:

-128

≤ n ≤ 127

Operation:

if zero bit is ‘0’

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1110

0001

nnnn

Description:

If the Zero bit is ‘0’, then the

program will branch.

The 2’s complement number ‘2n’ is

added to the PC. Since the PC will

have incremented to fetch the next

instruction, the new address will be

PC+2+2n. This instruction is then

a two-cycle instruction.

Words:

Cycles:

1(2)

Q Cycle Activity:

If Jump:

Decode

Read literal

'n'

Process

Data

Write to PC

operation

If No Jump:

Decode

Read literal

'n'

Process

Data

operation

Example:

HERE

BNZ

Jump

Before Instruction

address (HERE)

After Instruction

If Zero

address (Jump)

If Zero

address (HERE+2)

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