PIC18F4539-ESLASHMLSQTP datasheet(97/322 Pages) MICROCHIP

97 / 322 page

 2002 Microchip Technology Inc.

Preliminary

DS30485A-page 95

PIC18FXX39

TABLE 9-9:

PORTE FUNCTIONS

TABLE 9-10:

SUMMARY OF REGISTERS ASSOCIATED WITH PORTE

Name

Bit#

Buffer Type

Function

RE0/AN5/RD

bit0

ST/TTL(1)

Input/output port pin or analog input or read control input in Parallel

Slave Port mode

For RD (PSP mode):

= Not a read operation

= Read operation. Reads PORTD register (if chip selected).

RE1/AN6/WR

bit1

ST/TTL(1)

Input/output port pin or analog input or write control input in Parallel

Slave Port mode

For WR (PSP mode):

= Not a write operation

= Write operation. Writes PORTD register (if chip selected).

RE2/AN7/CS

bit2

ST/TTL(1)

Input/output port pin or analog input or chip select control input in

Parallel Slave Port mode

For CS (PSP mode):

= Device is not selected

= Device is selected

Legend: ST = Schmitt Trigger input, TTL = TTL input

Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

All Other

RESETS

PORTE

—

RE2

RE1

RE0

---- -000

LATE

—

LATE Data Output Register

---- -xxx

---- -uuu

TRISE

IBF

OBF

IBOV

PSPMODE

—

PORTE Data Direction bits

0000 -111

ADCON1

ADFM

ADCS2

—

PCFG3

PCFG2

PCFG1

PCFG0

00-- 0000

Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.

PIC18F4539-E/MLSQTP bảng dữ liệu(PDF) 97 Page - Microchip Technology

PIC18F4539-E/MLSQTP bảng dữ liệu(HTML) 97 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL