HT67F5652 datasheet(187/224 Pages) HOLTEK

187 / 224 page

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HT67F5652

24-Bit Delta Sigma A/D + LCD Flash MCU

HT67F5652

24-Bit Delta Sigma A/D + LCD Flash MCU

SEG0

SEG1

81H

80H

�0

�1

��

�3

A�H

SEG38

SEG39

LCD Memory Map

LCD Clock Source

TheLCDclocksourceistheinternalclocksignal,fSUB,dividedby8,usinganinternaldivider

circuit.ThefSUBinternalclockissuppliedbyeithertheLIRCorLXToscillator,thechoiceofwhich

isdeterminedbyaconfigurationoption.ForproperLCDoperation,thisarrangementisprovidedto

generateanidealLCDclocksourcefrequencyof4kHz.

fSUB Clock Source

LCD Clock Frequency

LIRC

4kHz

LXT

4kHz

LCD Clock Source

LCD Registers

ControlRegistersintheDataMemory,areusedtocontrolthevarioussetupfeaturesoftheLCD

Driver.ThereareseveralcontrolregistersfortheLCDfunction,LCDCP,LCDC,LCD1,LCD2and

LCD3.

TheLCDPRbitintheLCDCPregisterisusedtoselectthePLCDpinortheinternalchargepump

regulatortosupplythepowerfortheRtypeLCDCOMsandSEGspins.BitsCPVS1andCPVS0in

thesameregisterareusedtoselectanappropriatechargepumpoutputvoltagelevel.

VariousbitsintheLCDCregistercontrolfunctionssuchaswaveformtype,powersourceselection

andoverallLCDenable/disable.TheTYPEbitintheLCDCregisterisusedtoselectwhetherType

AorTypeBLCDcontrolsignalsareused.TheRCTbitintheLCDCregisterisusedtoselect

whetherRtypeorCtypeLCDdrivebias.BitsLCDP1andLCDP0intheLCDCregisterareused

toselectthepowersourcetosupplytheLCDpanelwiththecorrectbiasvoltages.BitsLCDIS0and

LCDIS1intheLCDCregisterareusedtoselecttheinternalbiascurrenttosupplytheLCDpanel

withthecorrectbiasvoltages.AchoicetobestmatchtheLCDpanelusedintheapplicationcanbe

selectedalsotominimisebiascurrent.TheENLCDbitintheLCDCregister,whichprovidesthe

overallLCDenable/disablefunction,willonlybeeffectivewhenthedeviceisintheNormal,Slow

orIdleMode.IfthedeviceisintheSleepModethenthedisplaywillalwaysbedisabled.

RegistersLCD1~LCD3,areusedtodetermineiftheoutputfunctionofdisplaypinsSEG0~SEG15,

SEG38~SEG39areusedassegmentdriversorI/Ofunctions.

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