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HT67F5652 bảng dữ liệu(PDF) 133 Page - Holtek Semiconductor Inc

tên linh kiện HT67F5652
Giải thích chi tiết về linh kiện  24-Bit Delta Sigma A/D LCD Flash MCU
PDF  224 Pages
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nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
Trang chủ  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT67F5652 bảng dữ liệu(HTML) 133 Page - Holtek Semiconductor Inc

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HT67F5652
24-Bit Delta Sigma A/D + LCD Flash MCU
HT67F5652
24-Bit Delta Sigma A/D + LCD Flash MCU
OPP[1:0]
OPN[1:0]
AN0
AN2
AN4
AN6
OPO
AN3
AN5
AN7
OPAMP
OPI+
OPI-
DSOPEN
OPO
Operational Amplifier Structure
A/D Programming Example
Example:UsinganEOCpollingmethodtodetecttheendofconversion
#include ht67f5652.inc
data .section ‘data’
adc_result_data_l db ?
adc_result_data_m db ?
adc_result_data_h db ?
code .section ‘code’
start:
clr
ADE
; disable ADC interrupt
mov
a, 083H
; Power control for PGA, ADC
mov PWRC, a
; PWRC=10000011, LDO enable, VCM enable, LDO Bypass disable,
; LDO output voltage: 3.3V
mov
a, 000H
mov
PGAC0, a
; PGA gain=1, ADC gain=1, VREF gain=1
mov
a, 000H
mov
PGAC1, a
; INIS, INX, DCSET in default value
clr
VRBUFP
; disable buffer for VREF+
clr
VRBUFN
; disable buffer for VREF-
set
VREFS
; for using external reference
clr
ADOR2
; for 10Hz output data rate, ADOR[2:0]=001, FLMS[2:0]=000
clr ADOR1
set ADOR0
clr FLMS2
clr FLMS1
clr FLMS0
clr
ADOFF
; ADC exit power down mode.
set
ADRST
; ADC in reset mode
clr
ADRST
; ADC in convertsion (continuous mode)
clr
EOC
; Clear "EOC" flag
loop:
snz
EOC
; Polling "EOC" flag
jmp
loop
; Wait for read data
clr
adc_result_data_h
clr
adc_result_data_m
clr
adc_result_data_l
set
ADCDL
; enable data latch
mov
a, ADRL
mov
adc_result_data_l, a ; Get Low byte ADC value
mov
a, ADRM
mov
adc_result_data_m, a ; Get Middle byte ADC value
mov
a, ADRH
mov
adc_result_data_h, a ; Get High byte ADC value
get_adc_value_ok:
clr
ADCDL
; disable data latch
clr
EOC
; Clearing read flag
jmp
loop
; for next data read
end



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