ATPL230A datasheet(11/122 Pages) ATMEL

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ATPL230A [DATASHEET]

Atmel-43053J-ATPL230A-Datasheet_22-Sep-16

For this circuit, Zero Cross Internal registers should be configured this way:

ZC_CONFIG.MODE_MUX = ‘0’

ZC_CONFIG.MODE_ASC = ‘0’

ZC_CONFIG.MODE_INV = ‘1’

ZC_CONFIG.MODE_REP = ‘0’

ZC_FILTER.ZC_FILTER_BP = ‘0’

Some situations (for example in some protocols needing to differentiate rising/falling edges in mains signal) could

require only ascent (or descent) mains signal zero-crossings to be detected. When we have to detect ascent or

descent Zero-Cross of the wave (finer line), the circuit should generate an input signal “VZ CROSS” (wider line) with

the same period, as specified in next figure. This could be easily implemented by using an unidirectional optocoupler

or a Zener diode topology in the external circuitry.

Figure 5-5.

Typical circuit, using a unidirectional optocoupler and a Schmitt trigger

The digital signal at output of Input Signal Management (ISM) is plotted in Figure 5-6.

Figure 5-6.

Digital signal (dashed line) at output of Input Signal Management (ISM) internal block

For this case, Zero Cross Internal registers should be configured this way:

ZC_CONFIG.MODE_MUX = ‘1’

ZC_CONFIG.MODE_ASC = ‘0’(ascent) or ‘1’(descent)

ZC_CONFIG.MODE_INV = ‘1’

ZC_CONFIG.MODE_REP = ‘1’

ZC_FILTER.ZC_FILTER_BP = ‘0’

See register description in Section 9.3.7.2 ”Zero Crossing Configuration Register” and Section 9.3.7.3 ”Zero Crossing

Filter Register”.

ZC signal provided

to VZ CROSS

Mains Signal

ATPL230A bảng dữ liệu(PDF) 11 Page - ATMEL Corporation