SLG46121 datasheet(2/98 Pages) DIALOG

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000-0046121--106

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SLG46121

1.0 Overview

The SLG46121 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit

design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the

macrocells of the SLG46121. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a

very small, low power single integrated circuit.

The additional power supply (VDD2) on the SLG46121 provides the ability to interface two independent voltage domains within

the same design. Users can configure pins, dedicated to each power supply, as inputs, outputs, or both (controlled dynamically

by internal logic) to both VDD and VDD2 voltage domains. Using the available macrocells designers can implement mixed-signal

functions bridging both domains or simply pass through level-translation in both High to Low and Low to High directions.

The macrocells in the device include the following:

•

Two Analog Comparators (ACMP)

•

Voltage References (Vref)

•

Five Combinatorial Look Up Tables (LUTs)

• One 2-bit LUTs

• Four 3-bit LUTs

•

Twelve Combination Function Macrocell

• Four Selectable DFF/Latch or 2-bit LUTs

• Four Selectable DFF/Latch or 3-bit LUTs

• One Selectable Pipe Delay or 3-bit LUT

• Pipe Delay – 8 stage / 2 output, one 1 stage fixed output

• Two Selectable Counter/Delay or 4-bit LUT

• One Programmable Delay / Deglitch Filter

•

Two Counter / Delay Generators (CNT/DLY)

• One 8-bit counter/delay

• One 14-bit counter/delay with external clock/reset

•

Eight D Flip-Flop / Latches (DFF) (Part of Combination Function Macrocell)

•

Additional Logic Function - 1 Inverter

•

Pipe Delay – 8 stage/2 output (Part of Combination Function Macrocell)

•

One Bandgap

•

RC Oscillator (RC OSC)

•

Power On Reset (POR)

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