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AR0134CSSC00SUEAD bảng dữ liệu(PDF) 10 Page - ON Semiconductor |
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AR0134CSSC00SUEAD bảng dữ liệu(HTML) 10 Page - ON Semiconductor |
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10 / 29 page ![]() AR0134CS www.onsemi.com 10 Table 4. PIN DESCRIPTIONS − 48-PIN ILCC PACKAGE, PARALLEL (continued) Pin Number Description Type Name 10 DOUT10 Output Parallel pixel data output 11 DOUT11 Output Parallel pixel data output (MSB) 12 VDD_IO Power I/O supply power 13 PIXCLK Output Pixel clock out. DOUT is valid on rising edge of this clock 14 VDD Power Digital power 15 SCLK Input Two-Wire Serial clock input 16 SDATA I/O Two-Wire Serial data I/O 17 RESET_BAR Input Asynchronous reset (active LOW). All settings are restored to factory default 18 VDD_IO Power I/O supply power 19 VDD Power Digital power 20 NC No connection 21 NC No connection 22 STANDBY Input Standby-mode enable pin (active HIGH) 23 OE_BAR Input Output enable (active LOW) 24 SADDR Input Two-Wire Serial address select 25 TEST Input Manufacturing test enable pin (connect to DGND) 26 FLASH Output Flash output control 27 TRIGGER Input Exposure synchronization input 28 FRAME_VALID Output Asserted when DOUT frame data is valid 29 LINE_VALID Output Asserted when DOUT line data is valid 30 DGND Power Digital ground 31 Reserved N/A Reserved (do not connect) 32 Reserved N/A Reserved (do not connect) 33 Reserved N/A Reserved (do not connect) 34 VAA Power Analog power 35 AGND Power Analog ground 36 VAA Power Analog power 37 VAA_PIX Power Pixel power 38 VAA_PIX Power Pixel power 39 AGND Power Analog ground 40 VAA Power Analog power 41 NC No connection 42 NC No connection 43 NC No connection 44 DGND Power Digital ground 45 DOUT0 Output Parallel pixel data output (LSB) 46 DOUT1 Output Parallel pixel data output 47 DOUT2 Output Parallel pixel data output 48 DOUT3 Output Parallel pixel data output |
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