LC823450 datasheet(28/112 Pages) ONSEMI

28 / 112 page

LC823450

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Table 10. TERMINAL FUNCTIONS (continued)

Terminal Name

Available (

POWER

Function

Direction

Polarity

Multiplexed

Function

XB,XD

XA,XC

POWER

OTHER, POWER

BMODE[1:0]

−

Bootmodeselect

Vdd2

TEST

Pos

Test mode (normally connect to

ground)

Vdd2

NRES

Neg

LSI reset Input

Vdd2

Vdd1

−

Digital core power

−

Vdd2

−

Digital IO power

−

VddSD0

−

Digital IO power

(SDI/F Ch0)

−

VddSD1

−

Digital IO power (SD(MS)I/F Ch1)

−

VddSD2

−

Digital IO power

(SDI/F Ch2)

−

VddQSPI

−

Digital IO power (QSPI)

−

Sum

All Sum

128

154

240

7. This function is not available

8. Set according to the General RTC mode or KeyInt RTC mode. Bonding internally for “TA” product as described on Page 7.

9. SDRAM address bit is 13bit including SDRADDR [12:11].

10. Set according to the frequency of XT1 (12/20/24/48 MHz).

Bonding internally for “TA’’ product as described on Page 5.

11. Audio clock is generated by one of PLL2 (1 V) or PLL3 (3 V).

One of PLL2 or PLL3 is available for “TA” and “RA” product. Please refer to Page 5 for more information.

Both of PLL2 and PLL3 are available for “XA”,“XB”, “XC” and “XD” products.

12. Audio clock is generated by one of PLL2 (1 V) or PLL3 (3 V).

One of PLL2 or PLL3 is available for “TA” and “RA” product. Please refer to Page 5 for more information.

Both of PLL2 and PLL3 are available for “XA”,“XB”, “XC” and “XD” products.

13. Analog ground is shared by PLL2 and PLL3.

14. Unused Input terminals and input state terminals of bidirectional should be set Pull−up/Down resister ON or connect to digital power supply or ground

(don’t let open).

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