STM32L432KB datasheet(97/149 Pages) STMICROELECTRONICS

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STM32L432KB STM3L432KC

Electrical characteristics

142

6.3.9

PLL characteristics

The parameters given in Table 48 are derived from tests performed under temperature and

VDD supply voltage conditions summarized in Table 20: General operating conditions.

Table 48. PLL, PLLSAI1 characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPLL_IN

PLL input clock(2)

-4

MHz

PLL input clock duty cycle

fPLL_P_OUT PLL multiplier output clock P

Voltage scaling Range 1

3.0968

MHz

Voltage scaling Range 2

3.0968

fPLL_Q_OUT PLL multiplier output clock Q

Voltage scaling Range 1

MHz

Voltage scaling Range 2

fPLL_R_OUT PLL multiplier output clock R

Voltage scaling Range 1

MHz

Voltage scaling Range 2

fVCO_OUT PLL VCO output

Voltage scaling Range 1

344

MHz

Voltage scaling Range 2

128

tLOCK

PLL lock time

μs

Jitter

RMS cycle-to-cycle jitter

System clock 80 MHz

-40

±ps

RMS period jitter

IDD(PLL)

PLL power consumption on

VDD(1)

VCO freq = 96 MHz

200

260

μA

VCO freq = 192 MHz

300

380

VCO freq = 344 MHz

520

650

1. Guaranteed by design.

2. Take care of using the appropriate division factor M to obtain the specified PLL input clock values. The M factor is shared

between the 2 PLLs.

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