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STM32F410RB bảng dữ liệu(PDF) 54 Page - STMicroelectronics |
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STM32F410RB bảng dữ liệu(HTML) 54 Page - STMicroelectronics |
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54 / 142 page ![]() Electrical characteristics STM32F410x8/B 54/142 DocID028094 Rev 5 PD Maximum allowed package power dissipation at TA = 85 °C (range 6) or 105 °C (range 7)(7) LQFP48 - - 364 mW LQFP64 - - 435 UFQFPN48 - - 606 WLCSP36 - - 328 UFBGA64 - - 253 Power dissipation at TA = 125 °C for range 3(7) LQFP48 - - 91 LQFP64 - - 108 UFQFPN48 - - 151 WLCSP36 - - 81 UFBGA64 - - 63 TA Ambient temperature for range 6 Maximum power dissipation –40 - 85 °C Low power dissipation(8) –40 - 105 Ambient temperature for range 7 Maximum power dissipation –40 - 105 Low power dissipation(8) –40 - 125 Ambient temperature for range 3 Maximum power dissipation -40 - 110 Low power dissipation(8) -40 - 130 TJ Junction temperature range Range 6 –40 - 105 Range 7 –40 - 125 Range 3 –40 - 130 1. VDD/VDDA minimum value of 1.7 V with the use of an external power supply supervisor (refer to Section 3.15.2: Internal reset OFF). 2. When the ADC is used, refer to Table 66: ADC characteristics. 3. If VREF+ pin is present, it must respect the following condition: VDDA-VREF+ < 1.2 V. 4. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and power-down operation. 5. Guaranteed by test in production. 6. To sustain a voltage higher than VDD+0.3, the internal Pull-up and Pull-Down resistors must be disabled 7. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax. 8. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax. Table 15. General operating conditions (continued) Symbol Parameter Conditions Min Typ Max Unit |
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