ST72321R7-Auto datasheet(214/243 Pages) STMICROELECTRONICS

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Electrical characteristics

ST72321xx-Auto

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Doc ID 13829 Rev 1

19.11.2

I2C - inter IC control interface

Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.

Refer to Section 19.8: I/O port pin characteristics for more details on the input/output

alternate function characteristics (SDAI and SCLI). The ST7 I2C interface meets the

requirements of the standard I2C communication protocol described in the following table.

Table 133.

I2C control interface characteristics

Symbol

Parameter

Standard mode I2CFast mode I2C(1)

Unit

Min(2)

Max(2)

Min(2)

Max(2)

tw(SCLL)

SCL clock low time

4.7

1.3

µs

tw(SCLH)

SCL clock high time

4.0

0.6

tsu(SDA)

SDA setup time

250

100

th(SDA)

SDA data hold time

0(3)

0(4)

900(3)

tr(SDA)

tr(SCL)

SDA and SCL rise time

1000

20+0.1Cb

300

tf(SDA)

tf(SCL)

SDA and SCL fall time

300

th(STA)

START condition hold time

4.0

0.6

µs

tsu(STA)

Repeated START condition setup time

4.7

tsu(STO)

STOP condition setup time

4.0

tw(STO:STA) STOP to START condition time (bus free)

4.7

1.3

Capacitive load for each bus line

400

At 4 MHz fCPU, maximum I

2C speed (400 kHz) is not achievable. In this case, maximum I2C speed will be approximately

260 kHz.

Data based on standard I2C protocol requirement, not tested in production.

The maximum hold time of the START condition has only to be met if the interface does not stretch the low period of SCL

signal.

The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the undefined region

of the falling edge of SCL.

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