ST72321R7-Auto datasheet(55/243 Pages) STMICROELECTRONICS

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ST72321xx-Auto

Interrupts

Doc ID 13829 Rev 1

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The TLI, RESET, and TRAP vectors have no software priorities. When one is serviced, the

I1 and I0 bits of the CC register are both set.

Caution:

If the I1_x and I0_x bits are modified while the interrupt x is executed the following behavior

has to be considered: If the interrupt x is still pending (new interrupt or flag not cleared) and

the new software priority is higher than the previous one, the interrupt x is re-entered.

Otherwise, the software priority stays unchanged up to the next interrupt request (after the

IRET of the interrupt x).

Note:

During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI

instructions change the current software priority up to the next IRET instruction or one of the

previously mentioned instructions.

Table 19.

Interrupt dedicated instruction set

Instruction

New description

Function/Example

HALT

Entering Halt mode

IRET

Interrupt routine return

Pop CC, A, X, PC

JRM

Jump if I1:0 = 11 (level 3)

I1:0 = 11 ?

JRNM

Jump if I1:0 <> 11

I1:0 <> 11 ?

POP CC

Pop CC from the Stack

Mem => CC

RIM

Enable interrupt (level 0 set)

Load 10 in I1:0 of CC

SIM

Disable interrupt (level 3 set) Load 11 in I1:0 of CC

TRAP

Software trap

Software NMI

WFI

Wait for interrupt

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