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LNBH25 bảng dữ liệu(PDF) 19 Page - STMicroelectronics |
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LNBH25 bảng dữ liệu(HTML) 19 Page - STMicroelectronics |
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19 / 34 page ![]() LNBH25 I²C interface protocol Doc ID 022433 Rev 4 19/34 7.2 Read mode transmission In Read mode the bytes sequence must be as follows: ● a start condition (S) ● a chip address byte with the LSB bit R/W=0 ● the register address byte of the internal first register to be accessed ● a stop condition (P) ● a new master transmission with the chip address byte and the LSB bit R/W=1 ● after the acknowledge the LNBH25 starts to send the addressed register content. As long as the master keeps the acknowledge LOW, the LNBH25 transmits the next address register byte content. ● the transmission is terminated when the master sets the acknowledge HIGH with a following stop bit. Figure 12. Example of reading procedure starting with first status address 0X0 (b) ACK = Acknowledge S = Start P = Stop R/W = 1/0, Read/Write bit X = 0/1, set the values to select the CHIP ADDRESS (see Chip Address in Table 16 for pin selection) and to select the REGISTER Address (see Table 7). b. The reading procedure can start from any register address (Status 1, 2 or Data1..4) by simply setting the X values in the register address byte (after the first Chip Address in the above figure). It can be also stopped from the master by sending a stop condition after any acknowledge bit. AM09914v2 S XX P 00 X 00 0 X 0 0 1 0 0 0 S XX P 00 X 00 0 X 0 1 0 0 0 P P MSB LSB DATA 1 Add=0x2 MSB LSB DATA 2 Add=0x3 MSB LSB DATA 3 Add=0x4 MSB LSB DATA 4 Add=0x5 MSB LSB DATA 1 Add=0x2 MSB LSB DATA 2 Add=0x3 MSB LSB DATA 3 Add=0x4 MSB LSB DATA 4 Add=0x5 MSB LSB STATUS 2 Add=0x1 MSB LSB STATUS 1 Add=0x0 MSB LSB STATUS 2 Add=0x1 MSB LSB STATUS 1 Add=0x0 SX 0 0 1 0 0 0 SX 0 1 0 0 0 MSB LSB CHIP ADDRESS MSB LSB REGISTER ADDRESS MSB LSB CHIP ADDRESS |
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