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LNBH25 bảng dữ liệu(PDF) 18 Page - STMicroelectronics |
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LNBH25 bảng dữ liệu(HTML) 18 Page - STMicroelectronics |
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18 / 34 page ![]() I²C interface protocol LNBH25 18/34 Doc ID 022433 Rev 4 7 I²C interface protocol 7.1 Write mode transmission The LNBH25 interface protocol comprises: ● a start condition (S) ● a chip address byte with the LSB bit R/W = 0 ● a register address (internal address of the first register to be accessed) ● a sequence of data (byte to write in the addressed internal register + acknowledge) ● the following bytes, if any, to be written in successive internal registers ● a stop condition (P). The transfer lasts until a stop bit is encountered ● the LNBH25, as slave, acknowledges every byte transfer. Figure 11. Example of writing procedure starting with first data address 0x2 (a) ACK = Acknowledge S = Start P = Stop R/W = 1/0, Read/Write bit X = 0/1, set the values to select the CHIP ADDRESS (see Chip Address in Table 16 for pin selection) and to select the REGISTER Address (see Table 7). a. The writing procedure can start from any Register Address by simply setting the X values in the Register Address byte (after the Chip Address). It can be also stopped from the master by sending a stop condition after any acknowledge bit. AM09913v2 S XX 00 X 00 0 X 0 0 1 0 0 0 S XX 00 X 00 0 X 0 1 0 0 0 MSB LSB CHIP ADDRESS MSB LSB REGISTER ADDRESS MSB LSB CHIP ADDRESS MSB LSB REGISTER ADDRESS P P MSB LSB MSB LSB MSB LSB MSB LSB DATA 1 Add=0x2 DATA 2 Add=0x3 DATA 3 Add=0x4 DATA 4 Add=0x5 MSB LSB MSB LSB MSB LSB MSB LSB DATA 1 Add=0x2 DATA 2 Add=0x3 DATA 3 Add=0x4 DATA 4 Add=0x5 |
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