L6706 datasheet(34/47 Pages) STMICROELECTRONICS

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Output voltage monitor and protections

L6706

34/47

Doc ID 15698 Rev 2

Output voltage monitor and protections

L6706 monitors through pin VSEN the regulated voltage in order to manage the OVP and

UVP conditions. Protections are active also during soft-start (See “Soft-start” Section) while

they are masked during D-VID transitions with an additional 67µs delay after the transition

has finished to avoid false triggering.

15.1

Undervoltage

If the output voltage monitored by VSEN drops more than 600 mV (typ) below the

programmed reference for more than one clock period, the L6706:

–

Permanently turns OFF the MOSFETs

–

Drives the OSC/ FAULT pin high (3.3 V typ).

–

Power supply or OUTEN pin cycling is required to restart operations.

15.2

Preliminary overvoltage

To provide a protection while VCC is below the UVLOVCC threshold is fundamental to avoid

damage to the CPU in case of failed HS MOSFETs. In fact, since the device is supplied from

the 12 V bus, it is basically “blind” for any voltage below the turn-on threshold (UVLOVCC). In

order to give full protection to the load, a preliminary-OVP protection is provided while VCC

is within UVLOVCC and UVLOPre-OVP.

This protection turns-on the low side MOSFETs as long as the VSEN pin voltage is greater

than 1.800 V with a 350 mV hysteresis. When set, the protection drives the LS MOSFET

with a gate-to-source voltage depending on the voltage applied to VCC. This protection

depends also on the OUTEN pin status as detailed in Figure 18.

A simple way to provide protection to the output in all conditions when the device is OFF

(then avoiding the unprotected red region in Figure 18-Left) consists in supplying the

controller through the 5 VSB bus as shown in Figure 18-Right: 5VSB is always present before

+12 V and, in case of HS short, the LS MOSFET is driven with 5V assuring a reliable

protection of the load.

Figure 18.

Output voltage protections and typical principle connections

Vcc

UVLO

OVP

UVLO

VCC

Preliminary OVP Enabled

VSEN Monitored

No Protection

Provided

(OUTEN = 1)

Programmable OVP

VSEN Monitored

(OUTEN = 0)

Preliminary OVP

VSEN Monitored

VCC

VCCDR

+12V

+5V

2.2

BAT54C

μF

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