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L9659 bảng dữ liệu(PDF) 15 Page - STMicroelectronics |
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L9659 bảng dữ liệu(HTML) 15 Page - STMicroelectronics |
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15 / 51 page ![]() L9659 Electrical specifications Doc ID 022048 Rev 2 15/51 tR_WAIT Rmeas wait time Wait time before AOUT voltage is stable for ADC reading R AOUT= 5.1k ; CAOUT=10nF - - 300 µs FENx input pins tFENfilter Minimum pulse width - 12 - 16 µs IFENPD Internal pull-down current VIN = VIL to VDD 20 - 50 µA VFENLO Input low voltage threshold - 0.8 - - V VFENHI Input high voltage threshold - - - 2.0 V TFENLATCH FEN Latch timer - 0 - 512 ms tFLACC FEN latch timer accuracy - - 20% - 20 % Deployment drivers TRESOLUTION Diagnostic timing / resolution IHS IMEAS, 0s T MEASURE_TIME 3.7ms CSQUIB _HI = 0.12µF CSQUIB _LO = 0.12µF 22.5 25 27.5 µs TACCURACY Diagnostic time acurracy -- 2 LSB IMEAS High side driver current limit detect threshold Guaranteed by design IHSX x 0.90 - IHSX x 0.99 A RDSonTOTAL Total high and low side MOS on resistance High side MOS + low side MOS D9:D8=”11”; VRES = 7V; I = 1.6A @95°C -- 2.0 RDSonHS High side MOS on resistance D9:D8=”11”; VRES = 7V; Tamb = 95°C; IVRES = 1.6A; -0.3 0.8 RDSonLS Low side MOS on resistance - 0.6 1.2 IHS_12A High side deployment current limit Configuration mode 1 bits D9:D8=”00” SQHx shorted to ground; VRES = 7 to 37V 1.21 - 1.47 A IHS_15A Configuration Mode 1 bits D9:D8=”01” SQHx shorted to ground; VRES = 7 to 25V 1.51 - 1.85 A IHS_175A Configuration Mode 1 bits D9:D8=”11” SQHx shorted to ground; VRES = 7 to 37V 1.76 - 2.14 A tILIM Low side MOS shutdown under short to battery Vsqblo=18V 90 - 110 µs ILS Low side MOS current limit 2.2 - 4.0 A Table 7. Squib deployment drivers and diagnostics - DC electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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