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IOBUS0 bảng dữ liệu(PDF) 46 Page - Future Technology Devices International Ltd. |
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IOBUS0 bảng dữ liệu(HTML) 46 Page - Future Technology Devices International Ltd. |
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46 / 88 page  46 C opyright © Future T ec hnology Devic es I nternational Limited Datasheet Vinculum-II Embedded Dual USB Host Controller IC V ers ion 1 .7 Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43 6.3.4 Half Duplex, 3 pin The 3 pin half duplex mode eliminates the MISO pin from the protocol. This means that status bytes need to be sent on the MOSI pin. Again the Master initiates a transfer by asserting SS# and sending out a command byte. The Slave sends status back to the Master. If a write has been requested and the status indicates that the Slave can accept data, MOSI should be changed to an output again and data will be sent from Master to Slave. Following this data, the Slave will send a further status byte if SS# remains active. If the status indicates that more data can be written, the next data byte can be sent to the Slave and this process continues until SS# is de-asserted. Figure 6.10 is an example of this: SS# MOSI 8 bit CMD Master to Slave STATUS W0 STATUS W1 Slave to Master Slave to Master Master to Slave Master to Slave Figure 6.10 Half Duplex 3-pin Data Master Write Data reads are similar expect that after the command byte all data transfer is from Slave to Master. Figure 6.11 is an example of this: SS# MOSI 8 bit CMD Master to Slave STATUS R0 STATUS R1 Slave to Master Figure 6.11 Half Duplex 3-pin Data Master Read |
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