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THCV231 bảng dữ liệu(PDF) 33 Page - THine Electronics, Inc.

tên linh kiện THCV231
Giải thích chi tiết về linh kiện  The THCV231 and THCV236 are designed to support video data transmission between the host and display.
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nhà sản xuất  THINE [THine Electronics, Inc.]
Trang chủ  http://www.thine.co.jp/index_e.html
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THCV231 bảng dữ liệu(HTML) 33 Page - THine Electronics, Inc.

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Security E
Table 33. THCV231 GPIO Control Register Map
Address (Hex)
Bit#
R/W
Default
(Hex)
Name
Description
Note
Sub-Link Slave
0xC0
7:5
R
0x0
Reserved
-
4
RW
1
GPIO4_TYPE
GPIO4 type select
0: Programmable GPIO
1: Through GPIO
-
3
RW
1
GPIO3_TYPE
GPIO3 type select
0: Programmable GPIO
1: Through GPIO
-
2:0
R
0x0
Reserved
-
0xC1
7:5
R
0x0
Reserved
-
4
R
0
GPIO4_INPUT_MONITOR
GPIO4 input value
(*1)
3
R
0
GPIO3_INPUT_MONITOR
GPIO3 input value
2:0
R
0x0
Reserved
-
0xC2
7:5
R
0x0
Reserved
-
4
RW
0
GPIO4_OUT
GPIO4 output value setting
(*2)
3
RW
0
GPIO3_OUT
GPIO3 output value setting
2:0
RW
0x0
Reserved
-
0xC3
7:5
R
0x0
Reserved
-
4:3
RW
0x0
GPIO_IO_SEL
GPIO input/output direction setting
See Table 27, Table 28 and Table 29
-
2:0
RW
0x7
Reserved
-
0xC4
7:5
R
0x0
Reserved
-
4
RW
1
GPIO4_FILT_ENABLE
GPIO4 input filter enable
0: Disable
1: Enable
(*3)
3
RW
1
GPIO3_FILT_ENABLE
GPIO3 input filter enable
0: Disable
1: Enable
2:0
RW
0x7
Reserved
-
0xC5
7:5
R
0x0
Reserved
-
4
RW
1
GPIO4_INT_ENABLE
GPIO4 interrupt enable
0: Disable
1: Enable
(*4)
3
RW
1
GPIO3_INT_ENABLE
GPIO3 interrupt enable
0: Disable
1: Enable
2:0
RW
0x7
Reserved
-
0xC6
7:5
R
0x0
Reserved
-
4
RW
0
GPIO4_OUTBUF_SEL
GPIO4 output buffer select
0: GPIO4 is open-drain output
1: GPIO4 is push pull output
-
3
RW
0
GPIO3_OUTBUF_SEL
GPIO3 output buffer select
0: GPIO3 is open-drain output
1: GPIO3 is push pull output
-
2:0
RW
0x0
Reserved
-
0xC7-0xCF
7:0
R
0x00
Reserved
-
*1
Active only when GPIO is set as input port.
*2
Active only when GPIO type is set as "Programmable GPIO" and set as output port.
*3
Filter eliminates input glitch shorter than tOSC/2.
*4
GPIO input transition is counted as GPIO_INT(0x82 bit3).



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