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THCV231_THCV236_Rev.2.30_E

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Table 20. Sub-Link slave register Read Procedure

Step

Description

R/W

Address

Write 1 or 0 and clear(auto clear) access status register (2WIRE_ACS_END_INT).

0x02 bit7

Set Device ID of Sub-Link Master device.

(Value corresponding to AIN1 and AIN0 setting. e.g. [AIN1,AIN0]=[0,0] → 7’h0B)

0x20

Set the byte number read from Sub-Link Slave(Max 16byte).

(Byte number = register value + 1)

0x22

Set the start address of Sub-Link Slave register to read.

0x24

Write 1 to RD_START_8B. (Start read access to Sub-Link Slave register)

0x26 (*1)

(*2)

2-wire serial slave of Sub-Link Master perform clock stretching until Sub-Link Slave

read data is stored in Sub-Link Master register (Address 0x10-0x1F).

(*3)

When read access is completed, read data is stored in Sub-Link Master register

(Address 0x10-0x1F) and 2WIRE_ACS_END_INT register value become 1 and

interrupt occurs (INT=H → L).

If read access was normally ended, read value should be “0x1”.

0x02

HOST MPU read data stored in Sub-Link Master register.

0x10-0x1F

*1 It’s Prohibit that HOST MPU start access to Sub-Link Slave or remote 2-wire serial slave before the previous access to

Sub-Link Slave or remote side 2-wire serial slave is completed.

*2 When 2WIRE_MODE = 00 (Clock Stretching Mode)

*3 When 2WIRE_MODE = 01 (No Clock Stretching Mode)

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