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WM9713 bảng dữ liệu(PDF) 19 Page - Wolfson Microelectronics plc

tên linh kiện WM9713
Giải thích chi tiết về linh kiện  AC 97 AUDIO TOUCHPANEL CODEC
PDF  111 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
Trang chủ  http://www.wolfsonmicro.com
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Preliminary Technical Data
WM9713L
1
PTD, March 2004, Rev 2.2
19
Clock mode and division ratios are controlled by register 44h as shown in Table 1.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
14:12
SEXT[6:4]
000 (div 1)
Defines clock division ratio for Hi-fi block:
000: f
001: f/2
...
111: f/8
11:8
SEXT[3:0]
0000 (div 1)
Defines clock division ratio for PCM
interface and voice DAC:
0000: f
0001: f/1
1111: f/16
7
CLKSRC
1 (ext clk)
Selects between PLL clock and External
clock
5:3
PENDIV
000 (div 16)
Sets PENADC clock divisor
000: f/16
001: f/12
010: f/8
011: f/6
100: f/4
101: f/3
110: f/2
111: f
2
CLKBX2
0 (Off)
Clock doubler for MCLKB
1
CLKAX2
0 (Off)
Clock doubler for MCLKA
44h
0
CLKMUX
0 (MCLKA)
Selects between MCLKA and MCLKB
(N.B. On power-up clock must be present
on MCLKA and must be active for 2 clock
cycles after switching to MCLKB)
Table 1 Clock Muxing and Division Control
INTERNAL CLOCK FREQUENCIES
The internal clock frequencies are defined as follows (refer to Figure 2):
AC97 CLK – nominally 24.576MHz, used to generate AC97 BITCLK at 12.288MHz.
HIFI CLK – for HIFI playback at 48ks/s HIFI CLK = 24.576MHz. See Table 2 for voice only
playback.
PCM CLK – see Table 2 for sample rate vs clock frequency.
SAMPLE RATE
PCM CLK
FREQUENCY
HIFI CLK
FREQUENCY
8ks/s voice and HIFI
2.048MHz
24.576MHz
8ks/s voice only (power save)
2.048MHz
4.096MHz
16ks/s voice and HIFI
4.096MHz
24.576MHz
16ks/s voice only (power save)
4.096MHz
8.192MHz
32ks/s voice and HIFI
8.192MHz
24.576MHz
48ks/s voice and HIFI
12.288MHz
24.576MHz
Table 2 Clock Division Mode Table



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