WM9713 datasheet(56/111 Pages) WOLFSON

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WM9713L

Preliminary Technical Data

PTD, March 2004, Rev 2.2

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

24h

Output Volume

Mapping (Jack

Insert)

3:2

DCDRVSEL

00: Default, AC coupled headphone.

01: OUT4 as mid-rail output buffer.

11: OUT3 as mid-rail output buffer.

Table 41 DC Coupled Headphone Configuration

In summary:

JIEN not set: Outputs work as normal as selected in the Powerdown and Output PGA Mux Select

registers.

JIEN set: On jack insert GPIO1/6/7/8 is pulled low, HPL and HPR are enabled, DCDRVSEL decides

if the headphones are DC or AC coupled and configures OUT3 or OUT4 to suit, EARSPKSEL

decides if MONO, OUT3 or OUT4 need to be tri-stated to ensure no sound out on the ear-speaker

and finally all other outputs are disabled as explained above to prevent pops on re-enabling.

On jack out GPIO1/6/7/8 is pulled high, the outputs work as normal as selected in the Powerdown

and Output PGA Mux Select registers except that HPL Volume is controlled by EARSPKSEL to

ensure correct ear speaker operation.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

24h Output

Volume

Mapping

(Jack

Insert)

JIEN

0 (OFF)

Jack Insert Enable – Takes output of GPIO1

logic

5Ah

Additional

Functions

(1)

7:6

JSEL

(GPIO1)

GPIO select for jack insert detection:

00: GPIO1

01: GPIO6

10: GPIO7

11: GPIO8

Table 42 Jack Insertion / Auto-Switching (1)

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