DDP3310B datasheet(40/60 Pages) MICRONAS

40 / 60 page

DDP 3310B

ADVANCE INFORMATION

Micronas

Pin 63 – Sync Signal Input HS (Fig. 4–3)

This pin gets the horizontal sync information. Either

single or double horizontal frequency or VGA horizon-

tal sync signal.

Pin 64 – Sync Signal Input VS (Fig. 4–3)

This pin gets the vertical sync information. Either sin-

gle or double vertical frequency or VGA vertical sync

signal.

Pin 65, 66 – Crystal Output / Input XTAL2 / XTAL1

(Fig. 4–19)

These pins are connected to an 5-MHz crystal oscilla-

tor. The security unit for the HOUT signal uses this

clock signal as reference.

Pin 67 – I2C Data Input/Output SDA (Fig. 4–20)

Via this pin the I2C-bus data are written to or read from

the DDP 3310B.

Pin 68 – I2C Clock Input SCL (Fig. 4–20)

Via this pin, the clock signal for the I2C-bus will be sup-

plied. The signal can be pulled down by an internal

transistor.

* Application Note:

All ground pins should be connected separately with

short and low-resistive lines to a central power supply

ground. Accordingly, all supply pins should be con-

nected separately with short and low-resistive lines to

the power supply. Decoupling capacitors from VSUPP

to GNDP, VSUPD to GNDD, and VSUPO to GNDO are

recommended to be placed as closely as possible to

the pins.

DDP3310B bảng dữ liệu(PDF) 40 Page - Micronas