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MCP19124 bảng dữ liệu(PDF) 17 Page - Microchip Technology

tên linh kiện MCP19124
Giải thích chi tiết về linh kiện  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
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 2016 Microchip Technology Inc.
DS20005619A-page 17
MCP19124/5
2.1.22
PDRV PIN
The gate of the low-side primary MOSFET is
connected to PDRV. The PCB tracing connecting
PDRV to the gate must be of minimal length and
appropriate width to handle the high-peak drive
currents and fast voltage transitions.
2.1.23
VDR PIN
The supply for the low-side drivers is connected to this
pin and has an absolute maximum rating of +13.5V.
This pin can be connected by an RC filter to the VDD
pin.
2.1.24
VDD PIN
The output of the internal +5.0V regulator is connected
to this pin. It is recommended that a 1.0 µF minimum/
4.7 µF maximum bypass capacitor be connected
between this pin and the GND pin of the device. The
bypass capacitor should be physically placed close to
the device.
2.1.25
VIN PIN
Input power connection pin of the device. It is
recommended that capacitance be placed between this
pin and the GND pin of the device.
2.1.26
VS PIN
Analog input connected to the noninverting input of the
overvoltage comparator. Typically used as output
voltage overvoltage protection. The inverting input of
the overvoltage comparator is controlled by the
OVREF DAC.
2.1.27
VCOMP PIN
EA2 Error amplifier output signal connecting to external
compensation
2.1.28
ICOMP PIN
EA1 Error amplifier output signal connecting to external
compensation.
2.1.29
EXPOSED PAD (EP)
It is recommended to connect the exposed pad to
AGND.



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