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GC2011A bảng dữ liệu(PDF) 38 Page - Texas Instruments |
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GC2011A bảng dữ liệu(HTML) 38 Page - Texas Instruments |
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38 / 50 page ![]() Texas Instruments Incorporated - 34 - GC2011A 3.3V DIGITAL FILTER CHIP SLWS129A This document contains information which may be changed at any time without notice 6.6 OUTPUT MODE REGISTER The output mode register controls the output formatting. ADDRESS 7: OUTPUT_REG BIT TYPE NAME DESCRIPTION 0,1 (LSBs) R/W NEG_OUT This two bit field controls the output sample negation as follows: NEG_OUT DESCRIPTION 0 don’t negate 1 negate full rate output samples 2 negate half rate output samples 3 negate quarter rate output samples When negation is enabled the circuit will negate the even time A-Path outputs and the odd time B-path outputs where the definition of even and odd time samples is shown in Figure 8. If the user desires to negate the odd time A-path outputs, or negate the even time B-path outputs, then the NEG_IN control should be used to negate the path’s input. 2 R/W 24BIT_MODE Enables the 24 bit mode. PATH_ADD and 24BIT_OUT must also be set in this register. A-path and B-path must be configured the same except for: B-path must be in the unsigned mode, A-path CIN must be zero, A-path AB_SEL is 1, and B-path AB_SEL is 0. 3 R/W 24BIT_OUT Enables the 24 bit output mode. The 24 bit B-path output samples are output on the A-out and B-out pins as follows: The upper 16 bits are output on the A-out pins, the lower 8 bits are output on the upper 8 bits of the B-out pins. 4,5 R/W MUX_MODE In the MUX_MODE the A-path and B-path outputs are multiplexed together on the A-out pins. The B-out pins are cleared. The MUX_MODE settings are: MUX_MODE DESCRIPTION 0 mux mode is off, 1 mux half rate outputs, 3 mux quarter rate outputs The multiplexed half rate outputs will generate a full rate output stream, the multiplexed quarter rate outputs will generate a half rate stream. The A-path sample is output first, followed by the B-path sample. 6 R/W PATH_ADD Adds the A-path and B-path results. The result is output on the B-out pins unless the 24BIT_OUT control is enabled. 7 R/W DAV_POLARITY Invert the polarity of the data valid (DAV) strobe. Figure 8 shows DAV with DAV_POLARITY = 0. 8-15 R/W - unused |
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