GC2011A datasheet(32/50 Pages) TI

32 / 50 page

Texas Instruments Incorporated

- 28 -

GC2011A 3.3V DIGITAL FILTER CHIP

SLWS129A

This document contains information which may be changed at any time without notice

6.0

CONTROL REGISTERS

The chip is configured and controlled through the use of 11 sixteen bit control registers. These registers are

accessed for reading or writing using the control bus pins (CE, RE, WE, A[0:8], and C[0:15]) described in the previous

section. The register names and their addresses are:

ADDRESS

NAME

ADDRESS

NAME

APATH_REG0

SNAP_REGA

APATH_REG1

SNAP_REGB

BPATH_REG0

SNAP_REGC

BPATH_REG1

ONE_SHOT

CASCADE_REG

NEW_MODES

COUNTER_REG

13 to 127

unused

GAIN_REG

128 to 255

Coefficient Registers

OUTPUT_REG

256 to 511

Snapram

The following sections describe each of these registers. The type of each register bit is either R or R/W

indicating whether the bit is read only or read/write. All bits are active high.

The APATH_REG0, APATH_REG1, BPATH_REG0, BPATH_REG1, CASCADE_REG and OUTPUT_REG

control register settings given in Section 3.0 will configure the chip into the most common modes of operation. This

Section describes the meanings of the individual register bits used to set up those modes.

GC2011A bảng dữ liệu(PDF) 32 Page - Texas Instruments