TPS80032A2ABYFFR datasheet(49/127 Pages) TI1

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TPS80032

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SWCS059I – MARCH 2011 – REVISED NOVEMBER 2014

The polarity is defined as following:

•

High level: resources are in active state

•

Low level: resources are in sleep state

Dedicated register bits (SENS_PREQ1, SENS_PREQ2 and SENS_PREQ3) allow reversing the PREQ

balls polarity (PHOENIX_SENS_TRANSITION register).

5.3.9

DVS Software Commands

Only SMPS DVS compliant can be accessed by the DVS-I2C.

On top of hardware commands, DVS compliant power resources (SMPS1/2/5) can receive additional

commands via the DVS-I2C. The DVS-I2C port can address two types of register:

•

A command register

•

A voltage register

The DVS command field (2 MSB bits of xxxx_CFG_FORCE register) will be interpreted as follow:

•

00: ON Force Voltage: The power resource is set in ON mode with the voltage value defined in the 6

LSB bits of the command register SMPS1/2/5_CFG_FORCE

•

01: ON: The power resource is set in ON mode with the voltage value defined in the

SMPS1/2/5_CFG_VOLTAGE voltage register

•

10: SLEEP Force Voltage: The power resource is set in SLEEP mode with the voltage value defined in

the 6 LSB bits of the command register SMPS1/2/5_CFG_FORCE

•

11: SLEEP: The power resource is set in SLEEP mode with the voltage value defined in the

SMPS1/2/5_CFG_VOLTAGE voltage register

The SLEEP Force Voltage command with the voltage value set at 000000 must be naturally interpreted as

a shutdown command for the power resource.

ON FORCE / SLEEP FORCE set the voltage independently of the adaptive voltage scaling. ON / SLEEP

follow the adaptive voltage scaling.

NOTE

•

Default value is the voltage value register (both register will be set with the same default

value)

•

When the voltage is switched on the force voltage value, this is done smoothly with a

maximum ramping define by register STEP

•

DVS has only access to register voltage and force voltage (no access to register step) for

SMPS1, SMPS2 and SMPS5

All power resources, LDOs and non-DVS-SMPS, can be accessed by the control I2C (CTL-I2C). The

control I2C allows the host processor to access all the internal registers for configuration purpose or

resource commands. LDOs state can be changed by writing to the register xxx_CFG_STATE register and

the output voltage level can be controlled by xxx_CFG_VOLTAGE register. The five LSBs represent a

binary value used to compute the absolute voltage value to be generated by the LDO:

Absolute Voltage value = 1.0 V + 0.1 V * (binary value - 00000001)

This equation applies to all general-purposes LDOs, for all codes from 00000001 to 00011000. For the

remaining codes, it has been specified dedicated output voltages:

•

00000000 sets the output voltage to 0 V

•

00011001 to 00011110 codes are reserved

•

00011111 code sets the output voltages at 2.75 V

Detailed Description

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