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TPS2140IPWPR bảng dữ liệu(PDF) 8 Page - Texas Instruments

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tên linh kiện TPS2140IPWPR
Giải thích chi tiết về linh kiện  ADJUSTABLE LDO AND SWITCH WITH DUAL CURRENT LIMIT FOR USB
PDF  33 Pages
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TPS2140IPWPR bảng dữ liệu(HTML) 8 Page - Texas Instruments

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TPS2140, TPS2141
TPS2150, TPS2151
SLVS399A − JANUARY 2002 − REVISED MAY 2006
8
www.ti.com
electrical characteristics over recommended operating junction temperature range,
VI(SW_IN) = 3.3 V for TPS2140/50, VI(SW_IN) = 5 V for TPS2141/51, VI(LDO_IN) =5V, all outputs unloaded
(unless otherwise noted) (continued)
power switch
PARAMETER
TEST CONDITIONS†
MIN
TYP
MAX
UNIT
TPS2140, TPS2150
TJ = 25°C, I = 500 mA,
VI(SW_EN) = 3.3 V or VI(/SW_EN) = 0 V
40
50
Switch on resistance
TPS2140, TPS2150
TJ = 110°C, I = 500 mA,
VI(SW_EN) = 3.3 V or VI(/SW_EN) = 0 V
65
m
Ω
Switch on resistance
(SW_IN to SW_OUT)
TPS2141, TPS2151
TJ = 25°C, I = 500 mA,
VI(SW_EN) = 5 V or VI(/SW_EN) = 0 V
40
50
m
Ω
TPS2141, TPS2151
TJ = 110°C, I = 500 mA,
VI(SW_EN) = 5 V or VI(/SW_EN) = 0 V
65
Switch low-current-limit cutoff
threshold, VCOFF(SW_OUT)
Low current limit is disabled when VO(SW_OUT)
is above this %VI(SW_IN) level
91%
93%
96%
Switch low-current-limit
cutin threshold, VCIN(SW_OUT)
Low current limit is enabled VO(SW_OUT) is be-
low this %VI(SW_IN) level
76%
79%
82%
Switch current limit
Low-current-limit mode:
Ramp-up current limit, IRCL
50
75
99
Switch current limit
Low-current-limit mode: Short-
SW_OUT is enabled into a
TJ = 25°C
50
75
99
mA
Low-current-limit mode: Short-
circuit dc current limit, IOS
SW_OUT is enabled into a
short to ground
TJ = 110°C
47
75
99
mA
High-current-limit mode:
TJ = 25°C
900
1300
1800
High-current-limit mode:
Overload dc current limit, IOL
TJ = 110°C
800
1300
1800
Switch forward leak-
age current ILK_SW
Current into pin SW_OUT
VO(SW_OUT) = 0 V, VI(SW_IN) = 5.5 V,
VI(SW_EN) = 0 V or VI(/SW_EN) = 5 V
10
A
Switch reverse leak-
age current IRLK_SW
Current into pin SW_OUT
VO(SW_OUT) = 5.5 V, VI(SW_IN) = 0 V,
VI(SW_EN) = 0 V or VI(/SW_EN) = 5 V
10
µA
Switch pulldown transistor current
VI(SW_PLDN) = 3.3 V
9
15
mA
Switch pulldown transistor current
VI(PLDN_SW) = 1 V
5
mA
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
timing parameters, power switch
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ton
Turnon time
CL = 10 µF, No load
1
toff
Turnoff time
CL = 10 µF, SW_OUT is connected to SW_PLDN, No load
8
ms
tr
Rise time
CL = 10 µF, No load
0.5
ms
tf
Fall time
CL = 10 µF, SW_OUT is connected to SW_PLDN, No load
5
undervoltage lockout, SW_IN
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Switch UVLO rising threshold
TPS2140, TPS2150
2.7
Switch UVLO rising threshold
TPS2141, TPS2151
4.1
V
Switch UVLO falling threshold
TPS2140, TPS2150
2.3
2.45
V
Switch UVLO falling threshold
TPS2141, TPS2151
3.5
3.9
UVLO hysteresis‡
250
mV
‡ Not tested in production.



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