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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TMS320C6421 bảng dữ liệu(PDF) 89 Page - Texas Instruments |
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TMS320C6421 bảng dữ liệu(HTML) 89 Page - Texas Instruments |
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89 / 222 page  3.7.3.2 Peripherals Spanning Multiple Pin Mux Blocks 3.7.3.3 Host Block Muxing TMS320C6421 Fixed-Point Digital Signal Processor www.ti.com SPRS346D – JANUARY 2007 – REVISED JUNE 2008 Some peripherals span multiple Pin Mux Blocks. To use these peripherals, they must be selected in all of the relevant Pin Mux Blocks. The following is the list of peripherals that span multiple Pin Mux Blocks: • McBSP0: Six McBSP0 pins are located in the Serial Port Sub-Block 0, but the CLKS0 pin is muxed in the Timer0 Block. To select McBSP0 pins, program PINMUX registers as follows: – Serial Port Sub-Block 0: SPBK0 = 01 – Timer0 Block: If CLKS0 pin is desired, program TIM0BK = 10 or 11. • UART0: The two UART0 data pins are located in the UART0 Data Block, but the two UART0 flow control pins are located in the UART0 Flow Control Block. To select UART0, program PINMUX registers as follows: – UART0 Data Block: UR0BK = 1 – UART0 Flow Control Block: If flow control pins are desired, program UR0FCBK = 01. This block of 27 pins consists of HPI, VLYNQ, EMAC(MII), MDIO, and GPIO muxed pins. The following register field selects the pin functions in the Host Block: • PINMUX1.HOSTBK Table 3-20 summarizes the 27 pins in the Host Block, the multiplexed function on each pin, and the PINMUX configurations to select the corresponding function. Submit Documentation Feedback Device Configurations 89 |
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