UCD3138128APFC datasheet(14/83 Pages) TI1

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UCD3138128A

SLUSC99 – JULY 2016

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(1)

Characterized by design and not production tested.

(2)

Time from close of error ADC sample window to time when digitally calculated control effort (duty cycle) is available. This delay, which

has no variation associated with it, must be accounted for when calculating the system dynamic response.

7.6 Timing Characteristics

V33A = V33D = V33DIO = 3.0V to 3.6V; 1μF from BP18 to DGND, TJ = –40°C to 125°C (unless otherwise noted)

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

EADC DAC

Settling Time(1)

From 10% to 90%

250

ADC12

ADC single sample conversion time(1)

ADC_SAMPLING_SEL= 0

3.9

μs

ADC single sample conversion time(1)

ADC_SAMPLING_SEL= 7

1..9

μs

SYSTEM PERFORMANCE

Processor master clock (MCLK)

31.25

MHz

tDelay

Digital filter delay(2)

MCLKs

f(PCLK)

Internal oscillator frequency

240

250

260

MHz

TWD

Watchdog time out range(1)

Total time is: TWD x (WDCTRL.PERIOD+1)

12.02

13.08

13.65

Time to disable DPWM output based on active

FAULT pin signal(1)

High level on FAULT pin

Flash Read

MCLKs

Retention period of flash content (data retention

and program)

TJ = 25°C

100

years

Program time to erase one page or block in data

flash or program flash

Program time to write one word in program flash

µs

Program time to write one word in data flash

µs

Sync-in/sync-out pulse width(1)

Sync pin

256

POWER ON RESET AND BROWN OUT (V33A pin, See Figure 9)

tPOR

(1)

Time delay after Power is good or RESET*

relinquished

tEXC1

The time it takes from the device to exit a reset

state and begin executing the boot flash.(1)

IRESET goes from a low state to a high state.

This is approximately equivalent to toggling

the external reset pin from low to high state.

0.5

tEXC2

The time it takes from the device to exit a reset

state and begin executing program flash bank 0

(32 kB).(1)

IRESET goes from a low state to a high state.

This is approximately equivalent to toggling

the external reset pin from low to high state.

tEXCT

The time it takes from the device to exit a reset

state and begin executing the total program flash

(64 kB).(1)

IRESET goes from a low state to a high state.

This is approximately equivalent to toggling

the external reset pin from low to high state.

TEMPERATURE SENSOR(1)

tON

(1)

Turn on time / settling time of sensor

100

μs

ANALOG COMPARATOR

Time to disable DPWM output based on 0 V to

2.5 V step input on the analog comparator.(1)

150

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