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SN65DP149 bảng dữ liệu(PDF) 7 Page - Texas Instruments

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SN65DP149 bảng dữ liệu(HTML) 7 Page - Texas Instruments

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SN65DP149, SN75DP149
www.ti.com
SLLSEL2C – SEPTEMBER 2015 – REVISED JULY 2016
Product Folder Links: SN65DP149 SN75DP149
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated
(1)
These values are based upon a microcontroller driving the control pins. The pullup/pulldown/floating resistor configuration will set the
internal bias to the proper voltage level which will not match the values shown here.
(2)
This value is based upon a microcontroller driving the OE pin. A passive reset circuit using an external capacitor and the internal pullup
resistor will set OE pin properly, but may have a different value than shown due to internal biasing.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
GENERAL PARAMETERS
VCC
Supply voltage
3
3.3
3.6
V
VDD
1.00
1.1
1.27
TCASE
Case temperature for RSB package
93.5
°C
TA
Operating free-air temperature
SN75DP149
0
85
°C
SN65DP149
–40
85
MAIN LINK DIFFERENTIAL PINS
VID_PP
Peak-to-peak input differential voltage
75
1200
mv
VIC
Input common mode voltage
0
2
V
CAC
AC coupling capacitance
75
100
200
nF
dR
Data rate
0.25
5
Gbps
Vsadj
TMDS-compliant swing voltage bias resistor
6.5
kΩ
CONTROL PINS
VI-DC
DC input voltage
–0.3
3.6
V
VIL
(1)
Low-level input voltage at OE
0.8
V
Low-level input voltage at SLEW_CTL, PRE_SEL, EQ_SEL/A0, SWAP/POL
0.3
VIM
(1)
No connect input voltage at SLEW_CTL, PRE_SEL, EQ_SEL/A0, SWAP/POL
1
1.2
1.4
V
VIH
(1)
High-level input voltage at SLEW_CTL, OE(2) , PRE_SEL, EQ_SEL/A0, SWAP/POL
2.6
V
VOL
Low-level output voltage
0.4
V
VOH
High-level output voltage
2.4
V
IIH
High-level input current
–30
30
µA
IIL
Low-level input current
–10
10
µA
IOS
Short circuit output current
–50
50
mA
IOZ
High impedance output current
10
µA
ROEPU
Pullup resistance on OE pin
150
250
kΩ
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2)
Test conditions for ΨJB and ΨJT are clarified in TI document Semiconductor and IC Package Thermal Metrics.
7.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC(1)
SNx5DP149
UNIT
RSB (WQFN)
40 PINS
RθJA
Junction-to-ambient thermal resistance
37.3
°C/W
RθJB
Junction-to-board thermal resistance (High-K board(2))
9.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance (High-K board(2))
23.1
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
3.2
°C/W
ψJT
Junction-to-top characterization parameter
0.3
°C/W
ψJB
Junction-to-case (bottom) thermal resistance
3.2
°C/W



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