SN65DP149 datasheet(32/54 Pages) TI1

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SN65DP149, SN75DP149

SLLSEL2C – SEPTEMBER 2015 – REVISED JULY 2016

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Product Folder Links: SN65DP149 SN75DP149

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8.5.4 I2C Control and Status Registers

Reads from reserved fields return 0, and writes to read-only reserved registers are ignored. Writes to reserved

registers, which are marked with ‘W’, produce unexpected behavior. All addresses not defined by this

specification are considered reserved. Reads from these addresses return 0 and writes will be ignored.

8.5.4.1 Bit Access Tag Conventions

A table of bit descriptions is typically included for each register description that indicates the bit field name, field

description, and the field access tags. The field access tags are described in Table 5.

Table 5. Field Access Tags

ACCESS TAG

NAME

DESCRIPTION

Read

The field is read by software

Write

The field is written by software

Set

The field is set by a write of one. Writes of 0 to the field have no effect

Clear

The field is cleared by a write of 1. Writes of 0 to the field have no

effect

Update

Hardware may autonomously update this field

No access

Not accessible or not applicable

8.5.4.2 CSR Bit Field Definitions

8.5.4.2.1

ID Registers

Table 6. ID Registers

ADDRESS

BIT

DESCRIPTION

ACCESS

00h:07h

7:0

DEVICE_ID

These fields return a string of ASCII characters “DP149” followed by three space characters.

Address 0x00 – 0x07 = {0x44”D”, 0x50”P”, 0x31”1”, 0x34”4”, 0x39”9”, 0x20, 0x20, 0x20}

08h

7:0

REV _ID. This field identifies the device revision.

0000001 – DP149 revision 1

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