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DP83950B bảng dữ liệu(PDF) 20 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện DP83950B
Giải thích chi tiết về linh kiện  RIC??Repeater Interface Controller
PDF  80 Pages
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nhà sản xuất  NSC [National Semiconductor (TI)]
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30 Pin Descriptions (Continued)
Pin
Pin
Driver
IO
Description
No
Name
Type
INTER-RIC BUS PINS
ACKI
TT
I
ACK
NOWLEDGE INPUT Input to the network ports’ arbitration chain
ACKO
TT
O
ACK
NOWLEDGE OUTPUT Output from the network ports’ arbitration chain
IRD
TT
B Z
I
NTER-RIC DATA When asserted as an output this signal provides a serial data stream in NRZ
format The signal is asserted by a RIC when it is receiving data from one of its network
segments The default condition of this signal is to be an input In this state it may be driven by
other devices on the Inter-RIC bus
IRE
TT
B Z
I
NTER-RIC ENABLE When asserted as an output this signal provides an activity framing enable
for the serial data stream The signal is asserted by a RIC when it is receiving data from one of
its network segments The default condition of this signal is to be an input In this state it may be
driven by other devices on the Inter-RIC bus
IRC
TT
B Z
I
NTER-RIC CLOCK When asserted as an output this signal provides a clock signal for the serial
data stream Data (IRD) is changed on the falling edge of the clock The signal is asserted by a
RIC when it is receiving data from one of its network segments The default condition of this
signal is to be an input When an input IRD is sampled on the rising edge of the clock In this
state it may be driven by other devices on the Inter-RIC bus
COLN
TT
B Z
COL
LISION ON PORT N This denotes that a collision is occurring on the port receiving the
data packet The default condition of this signal is to be an input In this state it may be driven by
other devices on the Inter-RIC bus
PKEN
C
O
P
ACKET ENABLE This output acts as an active high enable for an external bus transceiver (if
required) for the IRE IRC IRD and COLN signals When high the bus transceiver should be
transmitting on to the bus ie this RIC is driving the IRD IRE IRC and COLN bus lines When
low the bus transceiver should receive from the bus
CLKIN
TT
I
40 MHz CLOCKINPUT This input is used to generate the RIC’s timing reference for the state
machines and phase lock loop decoder
ACTND
OD
O
ACT
IVITY ON PORT NDRIVE This output is active when the RIC is receiving data or collision
information from one of its network segments
ACTNS
TT
I
ACT
IVITY ON PORT NSENSE This input senses when this or another RIC in a multi-RIC
system is receiving data or collision information
ANYXND
OD
O
A
CTIVITY ON ANY PORT EXCLUDING PORT NDRIVE This output is active when a RIC is
experiencing a transmit collision or multiple ports have active collisions on their network
segments
ANYXNS
TT
I
A
CTIVITY ON ANY PORT EXCLUDING PORT NSENSE This input senses when this RIC or
other RICs in a multi-RIC system are experiencing transmit collisions or multiple ports have
active collisions on their network segments
20



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