CS5530 datasheet(64/241 Pages) NSC

64 / 241 page

www.national.com

Revision 4.1

Functional Description (Continued)

Table 3-20. Primary Hard Disk Idle Timer and Trap Related Registers

Bit

Description

F0 Index 81h

Power Management Enable Register 2 (R/W)

Reset Value = 00h

Primary Hard Disk Idle Timer Enable: Turn on Primary Hard Disk Idle Timer Count Register (F0 Index 98h) and gener-

ate an SMI when the timer expires: 0 = Disable; 1 = Enable.

If an access occurs in the address ranges selected in F0 Index 93h[5], the timer is reloaded with the programmed count.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 85h/F5h[0].

F0 Index 82h

Power Management Enable Register 3 (R/W)

Reset Value = 00h

Primary Hard Disk Trap: 0 = Disable; 1 = Enable.

If this bit is enabled and an access occurs in the address ranges selected in F0 Index 93h[5], an SMI is generated.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 86h/F6h[0].

F0 Index 93h

Miscellaneous Device Control Register (R/W)

Reset Value = 00h

Partial Primary Hard Drive Decode: This bit is used to restrict the addresses which are decoded as primary hard drive

accesses.

0 = Power management monitors all reads and writes I/O Port 1F0h-1F7h, 3F6h-3F7h (excludes writes to 3F7h)

1 = Power management monitors only writes to I/O Port 1F6h and 1F7h

F0 Index 98h-99h

Primary Hard Disk Idle Timer Count Register (R/W)

Reset Value = 0000h

15:0

Primary Hard Disk Idle Timer Count: This idle timer is used to determine when the primary hard disk is not in use so

that it can be powered down. The 16-bit value programmed here represents the period of primary hard disk inactivity after

which the system is alerted via an SMI. The timer is automatically reloaded with the count value whenever an access

occurs to the configured primary hard disk’s data port (configured in F0 Index 93h[5]). The counter uses a 1 second time-

base.

To enable this timer set F0 Index 81h[0] = 1.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 85h/F5h[0].

CS5530 bảng dữ liệu(PDF) 64 Page - National Semiconductor (TI)