MB9B360R datasheet(137/166 Pages) CYPRESS

137 / 166 page

Document Number: 002-04872 Rev.*A

Page 137 of 166

MB9B360R Series

12.4.16 SD Card Interface Timing

Default-Speed Mode

Clock CLK (All values are referred to V

IH and VIL)

(VCC = 2.7V to 3.6V, VSS = 0V)

Parameter

Symbol

Pin name

Conditions

Value

Remarks

Min

Max

Clock frequency

Data Transfer Mode

fPP

S_CLK

CCARD ≤ 10pF

(1card)

MHz

Clock frequency

Identification Mode

fOD

S_CLK

0*/100

400

kHz

Clock low time

tWL

S_CLK

Clock high time

tWH

S_CLK

Clock rising time

tTLH

S_CLK

Clock falling time

tTHL

S_CLK

*: 0Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required.

Card Inputs CMD, DAT (referenced to Clock CLK)

Parameter

Symbol

Pin name

Conditions

Value

Remarks

Min

Max

Input set-up time

tISU

S_CMD,

S_DATA3:0

CCARD ≤ 10pF

(1card)

Input hold time

tIH

S_CMD,

S_DATA3:0

Card Outputs CMD, DAT (referenced to Clock CLK)

Parameter

Symbol

Pin name

Conditions

Value

Remarks

Min

Max

Output Delay time

during Data Transfer

Mode

tODLY

S_CMD,

S_DATA3:0

CCARD ≤ 40pF

(1card)

Output Delay time

durinn Identification

Mode

tODLY

S_CMD,

S_DATA3:0

Defalt-Speed Mode

Note: The Card Input corresponds to the Host Output and the Card Output corresponds to the Host Input because this model is the

Host.

VIL

tWL

tWH

VIH

tTHL

tTLH

tISU

VIH

VIL

VIH

VIL

tIH

VOH

VOL

VOH

VOL

tODLY(Max)

tODLY(Min)

S_CLK

(SD Clock)

S_CMD,

S_DATA3:0

(Card Input)

S_CMD,

S_DATA3:0

(Card Output)

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