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TDA9885TS/V3 bảng dữ liệu(PDF) 17 Page - NXP Semiconductors

tên linh kiện TDA9885TS/V3
Giải thích chi tiết về linh kiện  I2C-bus controlled single and multistandard alignment-free IF-PLL demodulators
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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TDA9885TS/V3 bảng dữ liệu(HTML) 17 Page - NXP Semiconductors

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2003 Oct 02
17
Philips Semiconductors
Product specification
I2C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
9.2.1
SUBADDRESS
If more than one data byte is transmitted, then auto-increment is performed: starting from the transmitted subaddress
and auto-increment of subaddress in accordance with the order of Table 10.
Table 10 Definition of the subaddress (second byte after slave address); note 1
Notes
1. X = don’t care.
2. Bit A7 = 1 is not allowed.
3. Bits A6 to A2 will be ignored by the internal hardware.
9.2.2
DATA BYTE FOR SWITCHING MODE
Table 11 Bit description of SAD register for switching mode (SAD = 00)
REGISTER
MSB
LSB
A7(2)
A6(3)
A5(3)
A4(3)
A3(3)
A2(3)
A1
A0
SAD for switching mode
0
XXXXX
0
0
SAD for adjust mode
0
XXXXX
0
1
SAD for data mode
0
XXXXX
1
0
BIT
VALUE
DESCRIPTION
B7
Output port 2 for SAW switching or monitoring
1
high-impedance, disabled or HIGH
0
low-impedance, active or LOW
B6
Output port 1 for SAW switching or external input
1
high-impedance, disabled or HIGH
0
low-impedance, active or LOW
B5
Forced audio mute
1on
0
off
B4 and B3
TV standard modulation
00
positive AM TV; note 1
01
not used
10
negative FM TV
11
not used
B2
Carrier mode
1
QSS mode
0
intercarrier mode
B1
Auto mute of FM AF output
1
active
0
inactive



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