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TDA9885TS/V3 bảng dữ liệu(PDF) 14 Page - NXP Semiconductors

tên linh kiện TDA9885TS/V3
Giải thích chi tiết về linh kiện  I2C-bus controlled single and multistandard alignment-free IF-PLL demodulators
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nhà sản xuất  PHILIPS [NXP Semiconductors]
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2003 Oct 02
14
Philips Semiconductors
Product specification
I2C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
Table 1
Slave address detection
9I2C-BUS CONTROL
9.1
Read format
Table 2
I2C-bus read format (slave transmits data)
Table 3
Explanation of Table 2
The master generates an acknowledge when it has received the dataword READ. The master next generates an
acknowledge, then slave begins transmitting the dataword READ, and so on until the master generates an
acknowledge-not bit and transmits a STOP condition.
SLAVE ADDRESS
SELECTABLE ADDRESS BIT
RESISTOR ON PIN
A3
A0
SIF1 AND SIF2
SIOMAD
MAD1
0
1
no
no
MAD2
0
0
no
yes
MAD3
1
1
yes
no
MAD4
1
0
yes
yes
S
BYTE 1
A
BYTE 2
AN
P
A6
A5
A4
A3
A2
A1
A0
R/W
D7D6D5D4D3D2D1D0
slave address
1
data
SYMBOL
FUNCTION
S
START condition, generated by the master
Slave address
see Table 4
R/W = 1
read command, generated by the master
A
acknowledge bit, generated by the slave
Data
8-bit data word, transmitted by the slave (see Table 5)
AN
acknowledge-not bit, generated by the master
P
STOP condition, generated by the master



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