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LP5952TLX-0.7/NOPB bảng dữ liệu(PDF) 12 Page - Texas Instruments |
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LP5952TLX-0.7/NOPB bảng dữ liệu(HTML) 12 Page - Texas Instruments |
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12 / 29 page ![]() IN OUT GATE 1.5V OFF VS GND LM5050- 1 Reverse Comparator LOAD INPUT 35 µA 14V 30 mV 30 µA 30 mV 5 µA - + - + Bias Circuitry 2A MOSFET Off +12V Charge Pump LM5050-1, LM5050-1-Q1 SNVS629E – MAY 2011 – REVISED DECEMBER 2015 www.ti.com 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 IN, GATE, and OUT Pins When power is initially applied, the load current will flow from source to drain through the body diode of the MOSFET. Once the voltage across the body diode exceeds VSD(REG) then the LM5050-1 begins charging the MOSFET gate through a 32 µA (typical) charge pump current source . In forward operation, the gate of the MOSFET is charged until it reaches the clamping voltage of the 12-V GATE to IN pin Zener diode internal to the LM5050-1. The LM5050-1 is designed to regulate the MOSFET gate-to-source voltage. If the MOSFET current decreases to the point that the voltage across the MOSFET falls below the VSD(REG) voltage regulation point of 22 mV (typical), the GATE pin voltage will be decreased until the voltage across the MOSFET is regulated at 22 mV. If the source-to-drain voltage is greater than the VSD(REG) voltage, the gate-to-source voltage will increase and eventually reach the 12-V GATE to IN pin Zener clamp level. 12 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: LM5050-1 LM5050-1-Q1 |
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