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RF430CL331HIPWR bảng dữ liệu(PDF) 27 Page - Texas Instruments

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RF430CL331HIPWR bảng dữ liệu(HTML) 27 Page - Texas Instruments

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RF430CL331H
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SLASE18A – SEPTEMBER 2015 – REVISED NOVEMBER 2015
The procedure:
1. PCD procedure:
(a) Issues a Capability Container or a NDEF Read Binary command.
2. Dynamic Tag/RF430CL331H procedure:
(a) Receives the RF packet.
(b) Checks its buffer and determines if all of the requested data in the Read Binary command exists
already in the buffer.
(c) If all the data is available in the buffer then (in the case that extra data was written in a previous
read request)
(i) No General Type 4 interrupt is issued to the host controller.
(ii) The data is supplied in the response packet to the PCD automatically.
(iii) The status word response SW1 = 90h and SW2 = 00h is appended to the packet.
(iv) The flow now goes to Step 4e.
(d) If no data or only partial data is available, then a General Type 4 interrupt is issued to the host
controller.
3. Host controller procedure:
(a) Interrupt is received.
(b) Checks the source of the interrupt by reading the interrupt registers (see Section 5.11.3).
(c) The source of the interrupt is the General Type 4 request.
(d) When there is a General Type 4 request, the Status register (see Section 5.11.2) must be read
and the Type 4 Command field examined to determine what Type 4 command has been received.
(e) The result is a Read Binary command.
(f) The NDEF File Identifier register (see Section 5.11.7) may be read, but it is not necessary as it is
always the file that the last Select command selected.
(g) Read the Buffer Start register (see Section 5.11.11) to determine where in the buffer of the
RF430CL331H to begin storing the data.
(h) Read the NDEF File Offset register (see Section 5.11.10) to determine at which index in the NDEF
or CC file to begin supplying the data to the RF430CL331H.
(i) Read the NDEF Block Length register (see Section 5.11.9) to determine what block length the
PCD is requesting.
(j) Check if the request is valid:
(i) If it is valid write the data into the buffer of the RF430CL331H starting at Buffer Start index for
NDEF Block Length bytes.
(ii) If it is not valid, assert the Custom Status Word option in the Host Response register (see
Section 5.11.8) and write the custom word in the Custom Status Word Response register (see
Section 5.11.13). Only the status word response supplied will be sent out.
(k) Write the requested amount of data to the buffer starting at the Buffer Start register index.
NOTE
Read caching (writing data beyond the request in a General Type 4 request interrupt)
should be avoided with the prefetch feature, because caching, at least initially, creates
latency because the system is waiting (blocking) for the General Type 4 request interrupt
to complete. Instead, in prefetch mode, only the requested data should be supplied in the
General Type 4 request interrupt. When the Extra Data interrupt occurs afterwards (in
tandem with the RF transmission), only then as much as possible extra data should be
written to the buffer.
(l) Update the NDEF Block Length register with how much bytes were written into the buffer.
(m) The interrupt must be cleared by writing to the Interrupt Flag register. (This step must be done
before setting the Interrupt Serviced field in the Host Response register.)
(n) To complete servicing the Read Binary command interrupt, set the Interrupt Serviced field in the
Host Response register.
Copyright © 2015, Texas Instruments Incorporated
Detailed Description
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