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XIO2001IPNP bảng dữ liệu(PDF) 114 Page - Texas Instruments

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tên linh kiện XIO2001IPNP
Giải thích chi tiết về linh kiện  PCI Express to PCI Bus Translation Bridge
PDF  141 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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XIO2001IPNP bảng dữ liệu(HTML) 114 Page - Texas Instruments

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XIO2001
SCPS212I – MAY 2009 – REVISED JANUARY 2016
www.ti.com
Product Folder Links: XIO2001
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
9 Application, Implementation, and Layout
9.1 Application Information
shows a typical implementation of the XIO2001 PCI Express (PCIe) to PCI translation bridge. The device serves
as a bridge between an upstream PCIe device and up to six downstream PCI bus devices. The XIO2001
operates only with the PCIe interface as the primary bus and the PCI bus interface as the secondary bus. The
PCI bus interface is 32 bits wide and the XIO2001 can be set to provide a PCI clock that operates at 25 MHz, 33
MHz, 50 MHz, or 66 MHz.
9.2 Typical Application
9.2.1 In-Card Implementation
Figure 24. Typical Application
A common application for the XIO2001 is a PCIe-to-PCI bridge add-in card which implements a peripheral
component interconnect (PCI) express to PCI bridge circuit using the Texas Instruments XIO2001 PCI Express
to PCI Bus Translation Bridge. Designed as an ×1 add-in card, it is routed on FR4 as a 8-layer (4 signals, 2
power, and 2 ground) board with a 100-
Ω differential impedance (50-Ω single-ended) using standard routing
guidelines and requirements.



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