SIO1007 datasheet(8/108 Pages) MICROCHIP

8 / 108 page

SIO1007

DS00002020A-page 8

 2005 - 2015 Microchip Technology Inc.

6,3,1,

DLAD[3:0]

Active high LPC signals used for

multiplexed command, address and

data bus between this device and the

Docking LPC SIO.

VCC

4-3

nDLFRAME

Active low signal indicates start of new

cycle and termination of broken cycle to

the Docking LPC SIO.

VCC

4-3

nDLDRQ1

Active low signal between this device

and the LPC Host used for encoded

DMA/Bus Master request for docking

LPC Super I/O to the LPC Host.

VCC

4-3

DLPC_CLK_33

Dedicated PCI clock switch output

between this device and the Docking

LPC SIO.

VCC

4-3

nDCLKRUN

This signal between this device and the

Docking LPC SIO is used to indicate

the PCI clock status and to request that

a stopped clock be started.

VCC

4-3

DSIO_14M

Buffered 14 Mhz clock output between

this device and the Docking LPC SIO.

O24

VCC

SERIAL PORT INTERFACE (8)

nDCD1

Active low Data Carrier Detect inputs

for the serial port. Handshake signal

which notifies the UART that carrier

signal is detected by the modem. The

CPU can monitor the status of nDCD

signal by reading bit 7 of Modem Status

change from low to high after the last

MSR read will set MSR bit 3 to a 1. If

bit 3 of Interrupt Enable Register is set,

the interrupt is generated when nDCD

changes state.

Note:

Bit 7 of MSR is the

complement of nDCD.

VCC

N/A

nDSR1

Active low Data Set Ready inputs for

the serial port. Handshake signal,

which notifies the UART that the

modem is ready to establish the

communication link. The CPU can

monitor the status of nDSR signal by

reading bit 5 of Modem Status Register

(MSR). A nDSR signal state change

from low to high after the last MSR read

will set MSR bit 1 to a 1. If bit 3 of

Interrupt Enable Register is set, the

interrupt is generated when nDSR

changes state.

Note:

Bit 5 of MSR is the

complement of nDSR.

VCC

N/A

RXD1

Receiver serial data input for port 1.

VCC

N/A

TABLE 4-1:

PIN FUNCTIONS (CONTINUED)

STQFP

Pin #

Name

Description

Buffer

Name

Input

Buffer

Power

Well

Output

Buffer

Power

Well

Notes

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