LAN9730 datasheet(210/222 Pages) MICROCHIP

210 / 222 page

LAN9730/LAN9730i

DS00001946A-page 210

 2012-2015 Microchip Technology Inc.

7.6

Clock Circuit

The device can accept either a 25 MHz crystal (preferred) or a 25 MHz single-ended clock oscillator (+/-50ppm) input.

If the single-ended clock oscillator method is implemented, XO should be left unconnected and XI should be driven with

a nominal 0-3.3 V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum.

It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal input/output signals

(XI/XO). Either a 300 µW or 100 µW 25 MHz crystal may be utilized. The 300 µW 25 MHz crystal specifications are

detailed in Section 7.6.1. The 100 µW 25 MHz crystal specifications are detailed in Section 7.6.2.

7.6.1

300 µW 25 MHZ CRYSTAL SPECIFICATIONS

When utilizing a 300 µW 25 MHz crystal, the following circuit design (Figure 7-11) and specifications (Table 7-23) are

required to ensure proper operation.

FIGURE 7-11:

300 µW 25 MHZ CRYSTAL CIRCUIT

TABLE 7-23:

300 µW CRYSTAL SPECIFICATIONS

Parameter

Symbol

Min.

Nom.

Max.

Unit

Note

Crystal Cut

AT, typ

Crystal Oscillation Mode

Fundamental Mode

Crystal Calibration Mode

Parallel Resonant Mode

Frequency

Ffund

25.000

MHz

Frequency Tolerance @ 25oCFtol

+/-50

PPM

Note 7-15

Frequency Stability Over Temp

Ftemp

+/-50

PPM

Note 7-15

Frequency Deviation Over Time

Fage

+/-3 to 5

PPM

Note 7-16

Total Allowable PPM Budget

+/-50

PPM

Note 7-17

Shunt Capacitance

7 typ

Load Capacitance

20 typ

Drive Level

300

µW

Equivalent Series Resistance

Ohm

Operating Temperature Range

Note 7-18

Note 7-19

XI Pin Capacitance

3 typ

Note 7-20

XO Pin Capacitance

3 typ

Note 7-20

LAN9730

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