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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TAS5731MPHPR bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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TAS5731MPHPR bảng dữ liệu(HTML) 10 Page - Texas Instruments |
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10 / 81 page  TAS5731M SLOS838C – JULY 2013 – REVISED AUGUST 2015 www.ti.com 7.10 Timing Requirements - PLL Input Parameters PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fMCLKI MCLK frequency 2.8224 24.576 MHz MCLK duty cycle 40% 50% 60% tr/tf(MCLK) Rise/fall time for MCLK 5 ns LRCLK allowable drift before LRCLK reset 4 MCLKs 7.11 Timing Requirements - Serial Audio Ports Slave Mode over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fSCLKIN Frequency, SCLK 32 × fS, 48 × fS, 64 × fS CL = 30 pF 1.024 12.288 MHz tsu1 Setup time, LRCLK to SCLK rising edge 10 ns th1 Hold time, LRCLK from SCLK rising edge 10 ns tsu2 Setup time, SDIN to SCLK rising edge 10 ns th2 Hold time, SDIN from SCLK rising edge 10 ns LRCLK frequency 8 48 48 kHz SCLK duty cycle 40% 50% 60% LRCLK duty cycle 40% 50% 60% SCLK rising edges between LRCLK rising SCLK 32 64 edges edges LRCLK clock edge with respect to the falling SCLK t(edge) –1/4 1/4 edge of SCLK period tr/tf Rise/fall time for SCLK/LRCLK 8 ns 7.12 Timing Requirements - I 2C Serial Control Port Operation for I 2C Interface signals over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT fSCL Frequency, SCL No wait states 400 kHz tw(H) Pulse duration, SCL high 0.6 μs tw(L) Pulse duration, SCL low 1.3 μs tr Rise time, SCL and SDA 300 ns tf Fall time, SCL and SDA 300 ns tsu1 Setup time, SDA to SCL 100 ns th1 Hold time, SCL to SDA 0 ns t(buf) Bus free time between stop and start conditions 1.3 μs tsu2 Setup time, SCL to start condition 0.6 μs th2 Hold time, start condition to SCL 0.6 μs tsu3 Setup time, SCL to stop condition 0.6 μs 7.13 Timing Requirements - Reset (RESET) control signal parameters over recommended operating conditions (unless otherwise noted). PARAMETER MIN TYP MAX UNIT tw(RESET) Pulse duration, RESET active 100 μs td(I2C_ready) Time to enable I2C 12 ms 10 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: TAS5731M |
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