AR0130CSSC00SPBA0-DP datasheet(19/53 Pages) ONSEMI

19 / 53 page

AR0130 DS Rev. L Pub. 6/15 EN

©Semiconductor Components Industries, LLC, 2015.

AR0130: 1/3-Inch CMOS Digital Image Sensor

Features

Additionally, the VCO frequency, defined as

must be within

384-768MHz and the EXTCLK must be within 2MHz =< fEXTCLK /N <= 24MHz

The user can utilize the Register Wizard tool accompanying DevWare to generate PLL

settings given a supplied input clock and desired output frequency.

Spread-Spectrum Clocking

To facilitate improved EMI performance, the external clock input allows for spread spec-

trum sources, with no impact on image quality. Limits of the spread spectrum input

clock are:

• 5% maximum clock modulation

• 35 KHz maximum modulation frequency

• Accepts triangle wave modulation, as well as sine or modified triangle modulations.

Stream/Standby Control

The sensor supports two standby modes: Hard Standby and Soft Standby. In both

modes, external clock can be optionally disabled to further minimize power consump-

tion. If this is done, then the “Power-Up Sequence” on page 48 must be followed.

Soft Standby

Soft Standby is a low power state that is controlled through register R0x301A[2].

Depending on the value of R0x301A[4], the sensor will go to standby after completion of

the current frame readout (default behavior) or after the completion of the current row

readout. When the sensor comes back from Soft Standby, previously written register

settings are still maintained.

A specific sequence needs to be followed to enter and exit from Soft Standby.

To Enter Soft Standby:

1. R0x301A[12] = 1 if serial mode was used

2. Set R0x301A[2] = 0

3. External clock can be turned off to further minimize power consumption (Optional)

To Exit Soft Standby:

1. Enable external clock if it was turned off

2. R0x301A[2] = 1

3. R0x301A[12] = 0 if serial mode is used

4P216



VCO

EXTCLK





AR0130CSSC00SPBA0-DP bảng dữ liệu(PDF) 19 Page - ON Semiconductor